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Guest
Guest	Posted: Tue Mar 16, 2026 4:50 am    Post subject: HTOL Biasing Condition   Hello folks, Can anyone tell me whether the HTOL test biasing condition be lower than the rated power supply, Vcc (max) condition? This is specific to the power devices that typically draws very high current. Thanks, New Rel Eng.
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FARel Engr
Joined: 20 Jun 2026 Posts: 76	Posted: Mon Mar 22, 2026 6:40 am    Post subject:   New Rel Engr, I assume that your end-user will have a way of 'cooling' down your IC while in use. This is what most rel people do to burn-in high power devices so they don't have to bring down the burn-in bias. They use low-temp burn-in ovens to cool down the devices while they are under burn-in, such that the junction temp of the devices will remain at the required temp of 125 deg C even if the devices are operated at normal power. It is important to let the devices see 'real-life' bias during burn-in, since you are testing them for their operating lifetimes after all. FARel Engr
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Guest
Guest	Posted: Fri Mar 26, 2026 6:49 am    Post subject: HTOL Biasing Condition   FARel Engr wrote: New Rel Engr, I assume that your end-user will have a way of 'cooling' down your IC while in use. This is what most rel people do to burn-in high power devices so they don't have to bring down the burn-in bias. They use low-temp burn-in ovens to cool down the devices while they are under burn-in, such that the junction temp of the devices will remain at the required temp of 125 deg C even if the devices are operated at normal power. It is important to let the devices see 'real-life' bias during burn-in, since you are testing them for their operating lifetimes after all. FARel Engr Hello FARel Engr, Thanks for your reply. I don't know what end user will do to cool down the device. However, I was using the Vcc(max) at 125C and having problem. As I am stressing the device, sometimes later, the Vcc(max) is dragging down to 0V and drawing much more current than initial. I have asked the senior engineer, and he thinks it's a board problem. I doubt he is right. Can the board be degraded during stress and drag the biasing to 0V drawing more current? Or it is related to the device? Thanks, New Rel. Engr.
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FARel Engr
Joined: 20 Jun 2026 Posts: 76	Posted: Sun Mar 28, 2026 12:01 am    Post subject:   Hi New Rel Engr, First off, we need to confirm something really important. Are you sure that the Tj of your high-power device is only at 125 C if max power is applied? Note that Tj is the temp of the die itself, and is different from the ambient temp inside the chamber. Thus, for a high power device, Tj may be much much higher than 125 C if the ambient temp of the oven is already at 125 C. Are the devices being damaged after your burn-in? If so, it's very possible that they underwent thermal runaway and failed due to EOS. If the burnt metal lines involve the supplies, then Vcc may have shorted to GND, resulting in the 0V that you see. Pls do FA on your samples to confirm. If the devices are still good, or the supplies are not shorted, then this may not be the case. Another reason for the lowering of voltage is that your power supply is not adequate for your purpose. Pls check its current capacity and compare it to your current consumption per device multiplied by the number of devices on the board. Your power supply must have enough capacity to meet your reqts. Pls keep us posted. FARel Engr
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