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Tin Whiskers (Page 2 of 2)
A common and
widely-held explanation for the formation of whiskers states that the
phenomenon is a stress-relief mechanism. According to this theory,
the tin layer or deposit becomes subject to internal residual stresses
once the tin plating process is completed.
Figure 2.
Photo of a 'bend' whisker (left) and a 'nodule' whisker (right);
source:
http://nepp.nasa.gov
The risks
posed by whisker formation generally fall under four categories: 1)
stable short circuits in low-current circuits (low voltage, high
impedance); 2) transient short circuits; 3) metal vapor arcing, wherein
the whisker is turned into a highly-conductive plasma for several
seconds (if the conditions for sustaining the metal vapor arc are met),
consuming adjacent materials as it conducts hundreds of amperes; and 4)
debris or contamination.
Tin whisker
formation may be avoided by not using pure tin in the lead finish
process. Adding about 3% of Pb by weight to Sn greatly reduces the
occurrence of whiskers, while using 5% Pb virtually eliminates it.
Then again, the industry is moving away from the use of Pb, so other Pb-free
lead finish alternatives must be explored. Please see the article
"A Pb-free Semiconductor
Industry" for more on this.
The industry
has yet to come up with a single standard for acceptance testing of lots
in relation to whisker formation. Recently, however, the National
Electronics Manufacturing Initiative (NEMI) has offered the electronics
industry a revised set of proposed recommendations
The revised acceptance test requirements have already been submitted to both IPC and JEDEC
for approval and subsequent release as a formal standard or guideline
for tin whisker acceptance testing for the industry.
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