Non-planar Oxide Integrated Circuit Wafers

Guest

Hello friend,

I'm reviewing military spec, one word that I don't want to pass without knowing its meaning, so anybody know meaning of "non-planar oxide intergrated circuit wafer" if yes, share me please.

Thank you very much,
Tata

Guest

tata,

in what context did the mil spec mention this? i just wanna know. anyway, 'non-planar' means that the wafer surface is not perfectly flat. when an oxide layer is deposited over a wafer, it follows the topography of everything under it: metal steps, etc. So it will have peaks and valleys where material under it was just deposited or removed.

To make a wafer 'planar', you can deposit a very thick oxide and just etch off the top part, or you can cover the wafer with a special material that doesn't follow the contour of the wafer that much and then just smoothen its top.

jrubio

Posted: Wed Dec 01, 2025 5:42 pm Post subject:

Thank you very much// Tata

Posted: Wed Dec 01, 2025 5:48 pm Post subject:

Oops ! jrubio
forgot to answer your question, it's defined in MIL-STD-883E method 2018.4 about Scanning Electron Microscope inspection /// Tata