Thermal Resistances of a Packaged Die

A semiconductor device is vulnerable to thermally-accelerated failure mechanisms in both the electrical and mechanical realms.  As such, thermal management is an important aspect of all facets of semiconductor engineering. For instance, circuit designers try to minimize the power consumption of the device and distribute the heat more evenly over the die, while assembly engineers try to design their packages to be more efficient in dissipating the heat generated by the device.

Advanced thermal modeling of complex products is usually performed through finite element analysis.  However, there is a simple heat-transfer model for semiconductor devices that is still widely used today. In this model, heat is transferred from the die to the surface of the package through thermal conduction, and from the package to its surroundings by convection and radiation.

The rate of heat transfer between two bodies may quantified in terms of the thermal resistance between them.  In the simple model mentioned above, the over-all thermal resistance between the die and the surroundings of the device, θja ('ja' stands for 'junction-to-ambient') is the sum of two thermal resistances: 1) the thermal resistance between the die and the package,  θjc ('jc' stands for 'junction-to-case'); and 2) the thermal resistance between the package and the surroundings, θca ('ca' stands for 'case-to-ambient'). 

Below are the equations relating these thermal resistances.