What is Latch-up?

Guest

One of our FA engineers said that my OQA reject failed because of eos caused by latchup. What is the meaning of this? Isn't this more of a symptom and not a cause (output is latched or fixed)? Maybe what he means is that the eos caused the latchup but he said latch-up is different. Please explain what is this latchup? Thank you.

CQE80

Posted: Fri Aug 01, 2026 11:41 am Post subject:

Hi CQE80,

No, latch-up the failure mechanism is not the same as latched output the failure mode. However, latch-up can result in damage that causes the output of a device to be latched.

Latch-up is a true failure mechanism, i.e., it is a phenomenon, and not just a symptom. If you’re familiar with thyristors, the mechanism of latch-up is very similar to how they work. Thyristors have a p-n-p-n structure that may be imagined as a PNP transistor connected to an NPN transistor in such a way that they feed each other with the necessary bias to keep them in ‘on’ state once they are turned on.

Latch-up arises because of the presence of unintentional or parasitic p-n-p-n structures on the die, which when coupled by parasitic resistances can really act like thyristors. These p-n junctions are actually part of the real die circuit, except that usually they belong to separate components in the real circuit. It’s like the p-n junction of one component interacting with the p-n junction of another one.

Combine the presence of these parasitic p-n-p-n transistors with a voltage or current spike while the device is biased, and what you get is latch-up. The spike triggers the p-n-p-n structure into the ‘on’ state, and the device bias keeps the parasitic thyristor conducting. If the current through the structure is large, electrical overstress will occur, permanently damaging the device. The damage may be in the form of the output of the device being latched to a certain voltage, which is why some engineers are confused by latch-up the mechanism and output latching the failure mode.

Thanks and keep on posting!

EE

Guest

Also called the SCR effect. where the input signal exceed the supply level.

ESD protective diode may be some of the cause, but more often are the die circuit it self produces such PNPN parasitic SCR.

Flipflop